发明授权
- 专利标题： Semiconductor chip with seal ring and sacrificial corner pattern
- 专利标题（中）： 半导体芯片具有密封圈和牺牲角图案
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申请号： US13112738申请日： 2011-05-20
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公开(公告)号： US08963291B2公开(公告)日： 2015-02-24
- 发明人: Takeshi Furusawa , Noriko Miura , Kinya Goto , Masazumi Matsuura
- 申请人： Takeshi Furusawa , Noriko Miura , Kinya Goto , Masazumi Matsuura
- 申请人地址： JP Kawasaki-shi
- 专利权人： Renesas Electronics Corporation
- 当前专利权人： Renesas Electronics Corporation
- 当前专利权人地址： JP Kawasaki-shi
- 代理机构： Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- 优先权： JP2004-264014 20040910
- 主分类号： H01L21/56
- IPC分类号： H01L21/56
摘要：
A semiconductor device including a low dielectric constant film of which the relative dielectric constant is less than 3.5, is provided with one or more seal rings that are moisture blocking walls forming a closed loop in a plan view, and where at least one of the seal rings includes a seal ring protrusion portion in inward protruding form in the vicinity of a chip corner.