发明授权
- 专利标题： Semiconductor structure and method for manufacturing the same
- 专利标题（中）： 半导体结构及其制造方法
-
申请号： US14002456申请日： 2012-03-23
-
公开(公告)号： US08969164B2公开(公告)日： 2015-03-03
- 发明人: Huilong Zhu , Zhijiong Luo , Haizhou Yin
- 申请人： Huilong Zhu , Zhijiong Luo , Haizhou Yin
- 申请人地址： CN Beijing
- 专利权人： Institute of Microelectronics, Chinese Academy of Sciences
- 当前专利权人： Institute of Microelectronics, Chinese Academy of Sciences
- 当前专利权人地址： CN Beijing
- 代理机构： Leason Ellis LLP.
- 优先权： CN201210022557 20120201
- 国际申请： PCT/CN2012/072981 WO 20120323
- 国际公布： WO2013/113184 WO 20130808
- 主分类号： H01L21/336
- IPC分类号： H01L21/336 ; H01L29/78 ; H01L29/66 ; H01L29/08 ; H01L21/84 ; H01L27/12 ; H01L21/8234 ; H01L29/51
摘要：
A semiconductor structure comprises a substrate, a gate stack, a base area, and a source/drain region, wherein the gate stack is located on the base area, the source/drain region is located in the base area, and the base area is located on the substrate. A supporting isolated structure is provided between the base area and the substrate, wherein part of the supporting structure is connected to the substrate; a cavity is provided between the base area and the substrate, wherein the cavity is composed of the base area, the substrate and the supporting isolated structure. A stressed material layer is provided on both sides of the gate stack, the base area and the supporting isolated structure. Correspondingly, a method is provided for manufacturing such a semiconductor structure, which inhibits the short channel effect, reduces the parasitic capacitance and leakage current, and enhances the steepness of the source/drain region.