Invention Grant
- Patent Title: Structure and manufacturing method of a non-volatile memory
- Patent Title (中): 非易失性存储器的结构和制造方法
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Application No.: US13869300Application Date: 2013-04-24
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Publication No.: US08981459B2Publication Date: 2015-03-17
- Inventor: Shih-Guei Yan , Wen-Jer Tsai , Chih-Chieh Cheng
- Applicant: MACRONIX International Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: MACRONIX International Co., Ltd.
- Current Assignee: MACRONIX International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L21/336 ; H01L27/115 ; H01L21/28

Abstract:
A semiconductor structure uses its control gate to be the wordline for receiving an operation voltage for the semiconductor structure. The semiconductor structure has a first and a second doped region and a buried channel between the first and the second doped region, wherein the buried channel has a first length along the first direction. The semiconductor structure further has a charge trapping layer stack on the buried channel and a conductive layer on the charge trapping layer stack, wherein the conductive layer extends along the first direction. The conductive layer is configured as both the control gate and the wordline of the semiconductor structure.
Public/Granted literature
- US20140264543A1 STRUCTURE AND MANUFACTURING METHOD OF A NON-VOLTAILE MEMORY Public/Granted day:2014-09-18
Information query
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