Invention Grant
- Patent Title: Semiconductor package structure
- Patent Title (中): 半导体封装结构
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Application No.: US13834787Application Date: 2013-03-15
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Publication No.: US08981575B2Publication Date: 2015-03-17
- Inventor: Pang-Chun Lin , Chun-Yuan Li , Chien-Ping Huang , Chun-Chi Ke
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW98146227A 20091231
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L23/495 ; H01L21/48 ; H01L23/31 ; H01L23/00

Abstract:
A semiconductor package structure includes: a dielectric layer; a metal layer disposed on the dielectric layer and having a die pad and traces, the traces each including a trace body, a bond pad extending to the periphery of the die pad, and an opposite trace end; metal pillars penetrating the dielectric layer with one ends thereof connecting to the die pad and the trace ends while the other ends thereof protruding from the dielectric layer; a semiconductor chip mounted on the die pad and electrically connected to the bond pads through bonding wires; and an encapsulant covering the semiconductor chip, the bonding wires, the metal layer, and the dielectric layer. The invention is characterized by disposing traces with bond pads close to the die pad to shorten bonding wires and forming metal pillars protruding from the dielectric layer to avoid solder bridging encountered in prior techniques.
Public/Granted literature
- US20130200508A1 SEMICONDUCTOR PACKAGE STRUCTURE Public/Granted day:2013-08-08
Information query
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