Invention Grant
- Patent Title: Method of testing a semiconductor package
- Patent Title (中): 测试半导体封装的方法
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Application No.: US13845698Application Date: 2013-03-18
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Publication No.: US08987012B2Publication Date: 2015-03-24
- Inventor: Pin-Cheng Huang , Chun-Tang Lin , Wen-Tsung Tseng , Yi-Che Lai
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconwave Precision Industries Co., Ltd.
- Current Assignee: Siliconwave Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW101140943A 20121105
- Main IPC: H01L21/66
- IPC: H01L21/66

Abstract:
A method of testing a semiconductor package is provided, including: disposing at least an interposer on a top surface of an adhesive layer, the interposer having a first surface and a second surface opposite to the first surface, a plurality of conductive elements disposed between the second surface of the interposer and the adhesive layer; disposing at least a semiconductor chip on the first surface of the interposer, and performing an electrical test on the semiconductor chip via the conductive elements, wherein if there are a plurality of semiconductor chips that are disposed on the first surface of the interposer, the step of disposing the semiconductor chip and performing the electrical test on the semiconductor chip is iterated; and removing the adhesive layer. By using the method, the fabrication cost and equipment cost of the semiconductor package are reduced, and product yield is increased.
Public/Granted literature
- US20140127838A1 METHOD OF TESTING A SEMICONDUCTOR PACKAGE Public/Granted day:2014-05-08
Information query
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