Invention Grant
US08987083B1 Uniform gate height for semiconductor structure with N and P type fins
有权
具有N型和P型翅片的半导体结构的均匀栅极高度
- Patent Title: Uniform gate height for semiconductor structure with N and P type fins
- Patent Title (中): 具有N型和P型翅片的半导体结构的均匀栅极高度
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Application No.: US14202985Application Date: 2014-03-10
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Publication No.: US08987083B1Publication Date: 2015-03-24
- Inventor: Zhenyu Hu , Zhao Lun , Xing Zhang
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Heslin Rothenberg Farley & Mesiti P.C.
- Agent Wayne F. Reinke, Esq.
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/108 ; H01L29/76 ; H01L29/66 ; H01L29/78 ; H01L21/308 ; H01L29/06

Abstract:
In a non-planar based semiconductor process where the structure includes both N and P type raised structures (e.g., fins), and where a different type of epitaxy is to be grown on each of the N and P type raised structures, prior to the growing, a lithographic blocking material over one of the N and P type raised structure portions is selectively etched to expose and planarize a gate cap. After the first type of epitaxy is grown, the process is repeated for the other of the N and P type epitaxy.
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