Invention Grant
US08988260B2 Method and circuit for continuous-time delta-sigma DAC with reduced noise
有权
具有降低噪声的连续时间Δ-ΣDAC的方法和电路
- Patent Title: Method and circuit for continuous-time delta-sigma DAC with reduced noise
- Patent Title (中): 具有降低噪声的连续时间Δ-ΣDAC的方法和电路
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Application No.: US13661114Application Date: 2012-10-26
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Publication No.: US08988260B2Publication Date: 2015-03-24
- Inventor: Martin Kinyua
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-chu
- Agency: Duane Morris LLP
- Main IPC: H03M3/00
- IPC: H03M3/00 ; H03M7/30

Abstract:
A continuous-time delta-sigma digital-to-analog converter (DAC) includes a first delta-sigma modulator configured to quantize a most significant bit or bits of a digital input signal and produce a first quantization error signal, and a second multi-stage delta-sigma modulator configured to quantize less significant bits of the digital input signal. A first DAC is coupled to an output of the first delta-sigma modulator, and a second DAC is coupled to an output of the second noise-shaping filter. The second DAC has a greater resolution than the first DAC. A low pass output filter is coupled to a sum of an output of the first DAC and an output of the second DAC.
Public/Granted literature
- US20130044018A1 METHOD AND CIRCUIT FOR CONTINUOUS-TIME DELTA-SIGMA DAC WITH REDUCED NOISE Public/Granted day:2013-02-21
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