Invention Grant
- Patent Title: Interlayer communications for 3D integrated circuit stack
- Patent Title (中): 3D集成电路堆栈的层间通信
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Application No.: US13976562Application Date: 2011-09-30
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Publication No.: US09000577B2Publication Date: 2015-04-07
- Inventor: Guido Droege , Niklas Linkewitsch , Andre Schaefer
- Applicant: Guido Droege , Niklas Linkewitsch , Andre Schaefer
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal, LLP
- International Application: PCT/US2011/054440 WO 20110930
- International Announcement: WO2013/048501 WO 20130404
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/522 ; H01L25/065 ; H01L23/64 ; H01L23/48

Abstract:
Some embodiments provide capacitive AC coupling inter-layer communications for 3D stacked modules.
Public/Granted literature
- US20130293292A1 INTERLAYER COMMUNICATIONS FOR 3D INTEGRATED CIRCUIT STACK Public/Granted day:2013-11-07
Information query
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