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    BACKGROUND REORDERING - A PREVENTIVE WEAR-OUT CONTROL MECHANISM WITH LIMITED OVERHEAD
    1.
    发明申请
    BACKGROUND REORDERING - A PREVENTIVE WEAR-OUT CONTROL MECHANISM WITH LIMITED OVERHEAD 有权
    背景技术 - 具有限制性的预防性磨损控制机制

    公开(公告)号：US20140379960A1

    公开(公告)日：2014-12-25

    申请号：US13991338

    申请日：2011-12-05

    Applicant: Niklas Linkewitsch

    Inventor： Niklas Linkewitsch

    IPC: G06F12/02 ,  G06F3/06

    CPC classification number: G06F12/0246 ,  G06F3/0619 ,  G06F3/0638 ,  G06F3/065 ,  G06F3/0679 ,  G06F2212/7211

    Abstract: Embodiments of the present disclosure describe background reordering techniques and configurations to prevent wear-out of an integrated circuit device such as a memory device. In one embodiment, a method includes receiving information about one or more incoming access transactions to a memory device from a processor, determining that a wear-leveling operation is to be performed based on a cumulative number of access transactions to the memory device, the cumulative number of access transactions including the one or more incoming access transactions, and performing the wear-leveling operation by mapping a first physical address of the memory device to a second physical address of the memory device based on a pseudo-random mapping function, and copying information from the first physical address to the second physical address. Other embodiments may be described and/or claimed.

    Abstract translation: 本公开的实施例描述了用于防止诸如存储器设备的集成电路设备的磨损的背景重排序技术和配置。 在一个实施例中，一种方法包括从处理器接收关于存储器设备的一个或多个传入访问事务的信息，基于对存储器设备的访问事务的累积次数确定要执行损耗均衡操作，累积 访问事务的数量，包括一个或多个传入访问事务，以及通过基于伪随机映射函数将存储器件的第一物理地址映射到存储器件的第二物理地址来执行损耗均衡操作，并且复制 从第一个物理地址到第二个物理地址的信息。 可以描述和/或要求保护其他实施例。

    Frame aligning deframer
    4.
    发明授权
    Frame aligning deframer 有权
    镜框对齐除镜

    公开(公告)号：US07215685B2

    公开(公告)日：2007-05-08

    申请号：US10091134

    申请日：2002-03-04

    Applicant: Niklas Linkewitsch

    Inventor： Niklas Linkewitsch

    IPC: H04J3/06

    CPC classification number: H04J3/0608

    Abstract: A method is disclosed of aligning a frame in a digital communication system. The method includes comparing a portion of a received data sequence to a portion of a predetermined sequence. If the total number of comparison errors does not exceed a tolerance threshold that is greater than zero then the frame is aligned.

    Abstract translation: 公开了一种在数字通信系统中对准帧的方法。 该方法包括将接收的数据序列的一部分与预定序列的一部分进行比较。 如果比较错误的总数不超过大于零的公差阈值，则帧对齐。

    CACHE OPERATIONS FOR MEMORY MANAGEMENT
    8.
    发明申请
    CACHE OPERATIONS FOR MEMORY MANAGEMENT 有权
    内存管理的高速缓存操作

    公开(公告)号：US20160203085A1

    公开(公告)日：2016-07-14

    申请号：US14127483

    申请日：2013-09-27

    Applicant: Tim KRANICH ,  Matthias GRIES ,  Niklas LINKEWITSCH

    Inventor： Tim KRANICH ,  Matthias GRIES ,  Niklas LINKEWITSCH

    IPC: G06F12/08 ,  G06F12/12 ,  G06F12/10 ,  G06F9/44

    CPC classification number: G06F12/0891 ,  G06F9/4406 ,  G06F12/0238 ,  G06F12/0246 ,  G06F12/0802 ,  G06F12/0848 ,  G06F12/0877 ,  G06F12/0893 ,  G06F12/1054 ,  G06F12/12 ,  G06F12/126 ,  G06F2212/1016 ,  G06F2212/1021 ,  G06F2212/1032 ,  G06F2212/60 ,  G06F2212/7201 ,  G06F2212/7203 ,  G06F2212/7211 ,  Y02D10/13

    Abstract: In accordance with the present description, cache operations for a memory-sided cache in front of a backing memory such as a byte-addressable non-volatile memory, include combining at least two of a first operation, a second operation and a third operation, wherein the first operation includes evicting victim cache entries from the cache memory in accordance with a replacement policy which is biased to evict cache entries having clean cache lines over evicting cache entries having dirty cache lines. The second operation includes evicting victim cache entries from the primary cache memory to a victim cache memory of the cache memory, and the third operation includes translating memory location addresses to shuffle and spread the memory location addresses within an address range of the backing memory. It is believed that various combinations of these operations may provide improved operation of a memory. Other aspects are described herein.

    Abstract translation: 根据本说明书，在诸如字节可寻址非易失性存储器的后备存储器之前的存储器侧高速缓存的高速缓存操作包括组合第一操作，第二操作和第三操作中的至少两个， 其中所述第一操作包括根据替代策略来驱逐来自所述高速缓冲存储器的受害者缓存条目，所述替换策略被偏置以驱逐具有干净高速缓存行的高速缓存条目，以驱逐具有脏高速缓存行的高速缓存条目。 第二操作包括将从高速缓冲存储器的受害者缓存条目驱逐到高速缓冲存储器的受害缓存存储器，并且第三操作包括转换存储器位置地址，以便将后续存储器的地址范围内的存储器位置地址进行混洗和扩展。 相信这些操作的各种组合可以提供改进的存储器的操作。 本文描述了其它方面。

    Background reordering—a preventive wear-out control mechanism with limited overhead
    9.
    发明授权
    Background reordering—a preventive wear-out control mechanism with limited overhead 有权
    背景重新排序 - 具有有限开销的预防性磨损控制机制

    公开(公告)号：US09268686B2

    公开(公告)日：2016-02-23

    申请号：US13991338

    申请日：2011-12-05

    Applicant: Niklas Linkewitsch

    Inventor： Niklas Linkewitsch

    IPC: G06F13/12 ,  G06F13/38 ,  G06F12/02 ,  G06F3/06

    CPC classification number: G06F12/0246 ,  G06F3/0619 ,  G06F3/0638 ,  G06F3/065 ,  G06F3/0679 ,  G06F2212/7211

    Abstract: Embodiments of the present disclosure describe background reordering techniques and configurations to prevent wear-out of an integrated circuit device such as a memory device. In one embodiment, a method includes receiving information about one or more incoming access transactions to a memory device from a processor, determining that a wear-leveling operation is to be performed based on a cumulative number of access transactions to the memory device, the cumulative number of access transactions including the one or more incoming access transactions, and performing the wear-leveling operation by mapping a first physical address of the memory device to a second physical address of the memory device based on a pseudo-random mapping function, and copying information from the first physical address to the second physical address. Other embodiments may be described and/or claimed.

    Abstract translation: 本公开的实施例描述了用于防止诸如存储器设备的集成电路设备的磨损的背景重排序技术和配置。 在一个实施例中，一种方法包括从处理器接收关于存储器设备的一个或多个传入访问事务的信息，基于对存储器设备的访问事务的累积次数确定要执行损耗均衡操作，累积 访问事务的数量，包括一个或多个传入访问事务，以及通过基于伪随机映射函数将存储器件的第一物理地址映射到存储器件的第二物理地址来执行损耗均衡操作，并且复制 从第一个物理地址到第二个物理地址的信息。 可以描述和/或要求保护其他实施例。

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