Invention Grant
- Patent Title: Digital power gating with state retention
- Patent Title (中): 数字电源门控与状态保持
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Application No.: US14202275Application Date: 2014-03-10
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Publication No.: US09007122B2Publication Date: 2015-04-14
- Inventor: James R. Lundberg
- Applicant: Via Technologies, Inc.
- Applicant Address: TW New Taipei
- Assignee: Via Technologies, Inc.
- Current Assignee: Via Technologies, Inc.
- Current Assignee Address: TW New Taipei
- Agent Gary Stanford; James W. Huffman
- Main IPC: G05F1/10
- IPC: G05F1/10 ; H03K17/22 ; G06F1/32 ; H03K19/00 ; H03K17/16

Abstract:
A digital power gating system for performing power gating to reduce a voltage of a gated supply bus to a state retention voltage level that reduces leakage current while retaining a digital state of a functional circuit. The power gating system includes gating devices and a power gating control system. Each gating device has current terminals coupled between a global supply bus and the gated supply bus, and a control terminal controlled by a bit of a digital control value. The power gating control system successively adjusts the digital control value to reduce a voltage of the gated supply bus to the state retention voltage level. Adjustment gain and/or adjustment periods may be changed, such as when the digital control value reaches certain values or when the gated supply reaches certain voltage levels. Various parameters are programmable to adjust for particular configurations or to achieve desired operation.
Public/Granted literature
- US20140361819A1 DIGITAL POWER GATING WITH STATE RETENTION Public/Granted day:2014-12-11
Information query
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