Invention Grant
US09019779B2 Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
有权
用于物理布局的装置和方法,用于同时辅助可访问的存储器模块
- Patent Title: Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
- Patent Title (中): 用于物理布局的装置和方法,用于同时辅助可访问的存储器模块
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Application No.: US14046756Application Date: 2013-10-04
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Publication No.: US09019779B2Publication Date: 2015-04-28
- Inventor: Terry R. Lee , Joseph Jeddeloh
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G11C5/02 ; H05K1/18 ; H05K1/02

Abstract:
A layout for simultaneously sub-accessible memory modules is disclosed. In one embodiment, a memory module includes a printed circuit board having a plurality of sectors, each sector being electrically isolated from the other sectors and having a multi-layer structure. At least one memory device is attached to each sector, the memory devices being organized into a plurality of memory ranks. A driver is attached to the printed circuit board and is operatively coupled to the memory ranks. The driver is adapted to be coupled to a memory interface of the computer system. Because the sectors are electrically-isolated from adjacent sectors, the memory ranks are either individually or simultaneously, or both individually and simultaneously accessible by the driver so that one or more memory devices on a particular sector may be accessed at one time. In an alternate embodiment, the printed circuit board includes a driver sector electrically isolated from the other sectors and having a multi-layer structure, the driver being attached to the driver sector.
Public/Granted literature
- US20140029325A1 APPARATUS AND METHODS FOR A PHYSICAL LAYOUT OF SIMULTANEOUSLY SUB-ACCESSIBLE MEMORY MODULES Public/Granted day:2014-01-30
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