公开(公告)号：US08788765B2

公开(公告)日：2014-07-22

申请号：US13960243

申请日：2013-08-06

Applicant: Micron Technology, Inc.

Inventor： Joseph Jeddeloh

IPC: G06F12/00

CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/067 ,  G06F13/1642 ,  G06F13/1673

Abstract: A memory controller and method for managing the issuance of read and write requests to a system memory is provided. The number of outstanding read requests and write requests issued to the system memory are separately monitored and further issuance of read and write requests to the system memory is separately controlled based on the number of outstanding read and write requests, respectively. For example, the issuance of read and write requests can be managed by halting and resuming the issuance of read and write requests to the system memory to maintain the number of outstanding read requests between first and second read thresholds and to maintain the number of outstanding write requests between first and second write thresholds, respectively.

Abstract translation: 提供了一种用于管理向系统存储器发出读取和写入请求的存储器控​​制器和方法。 分别监视发给系统存储器的未完成的读取请求和写入请求的数量，并且基于未完成的读取和写入请求的数量分别控制对系统存储器的读取和写入请求的进一步发布。 例如，读取和写入请求的发布可以通过停止并恢复对系统存储器的读取和写入请求的发出来管理，以保持在第一和第二读取阈值之间的未完成的读取请求的数量，并且保持未完成的写入的数量 第一和第二写入阈值之间的请求。

公开(公告)号：US20140029325A1

公开(公告)日：2014-01-30

申请号：US14046756

申请日：2013-10-04

Applicant: Micron Technology, Inc.

Inventor： Terry R. Lee ,  Joseph Jeddeloh

IPC: G11C5/02

CPC classification number: G11C5/02 ,  H05K1/0298 ,  H05K1/181 ,  H05K2201/09972 ,  Y02P70/611

Abstract: A layout for simultaneously sub-accessible memory modules is disclosed. In one embodiment, a memory module includes a printed circuit board having a plurality of sectors, each sector being electrically isolated from the other sectors and having a multi-layer structure. At least one memory device is attached to each sector, the memory devices being organized into a plurality of memory ranks. A driver is attached to the printed circuit board and is operatively coupled to the memory ranks. The driver is adapted to be coupled to a memory interface of the computer system. Because the sectors are electrically-isolated from adjacent sectors, the memory ranks are either individually or simultaneously, or both individually and simultaneously accessible by the driver so that one or more memory devices on a particular sector may be accessed at one time. In an alternate embodiment, the printed circuit board includes a driver sector electrically isolated from the other sectors and having a multi-layer structure, the driver being attached to the driver sector.

Abstract translation: 公开了一种用于同时可辅助存储器模块的布局。 在一个实施例中，存储器模块包括具有多个扇区的印刷电路板，每个扇区与其它扇区电隔离并且具有多层结构。 至少一个存储器装置连接到每个扇区，存储器装置被组织成多个存储器等级。 驱动器连接到印刷电路板并且可操作地耦合到存储器等级。 驱动器适于耦合到计算机系统的存储器接口。 由于扇区与相邻扇区电隔离，所以存储器排列是单独地或同时地存在的，或者由驱动器单独地并且可以同时访问，使得一次可以访问特定扇区上的一个或多个存储器件。 在替代实施例中，印刷电路板包括与其他扇区电隔离并具有多层结构的驱动器扇区，该驱动器附接到驱动器扇区。

公开(公告)号：US09019779B2

公开(公告)日：2015-04-28

申请号：US14046756

申请日：2013-10-04

Applicant: Micron Technology, Inc.

Inventor： Terry R. Lee ,  Joseph Jeddeloh

IPC: G11C7/10 ,  G11C5/02 ,  H05K1/18 ,  H05K1/02

CPC classification number: G11C5/02 ,  H05K1/0298 ,  H05K1/181 ,  H05K2201/09972 ,  Y02P70/611

Abstract: A layout for simultaneously sub-accessible memory modules is disclosed. In one embodiment, a memory module includes a printed circuit board having a plurality of sectors, each sector being electrically isolated from the other sectors and having a multi-layer structure. At least one memory device is attached to each sector, the memory devices being organized into a plurality of memory ranks. A driver is attached to the printed circuit board and is operatively coupled to the memory ranks. The driver is adapted to be coupled to a memory interface of the computer system. Because the sectors are electrically-isolated from adjacent sectors, the memory ranks are either individually or simultaneously, or both individually and simultaneously accessible by the driver so that one or more memory devices on a particular sector may be accessed at one time. In an alternate embodiment, the printed circuit board includes a driver sector electrically isolated from the other sectors and having a multi-layer structure, the driver being attached to the driver sector.

Abstract translation: 公开了一种用于同时可辅助存储器模块的布局。 在一个实施例中，存储器模块包括具有多个扇区的印刷电路板，每个扇区与其它扇区电隔离并且具有多层结构。 至少一个存储器装置连接到每个扇区，存储器装置被组织成多个存储器等级。 驱动器连接到印刷电路板并且可操作地耦合到存储器等级。 驱动器适于耦合到计算机系统的存储器接口。 由于扇区与相邻扇区电隔离，所以存储器排列是单独地或同时地存在的，或者由驱动器单独地并且可以同时访问，使得一次可以访问特定扇区上的一个或多个存储器件。 在替代实施例中，印刷电路板包括与其他扇区电隔离并具有多层结构的驱动器扇区，该驱动器附接到驱动器扇区。