Invention Grant
- Patent Title: Integrated circuit with error repair and fault tolerance
- Patent Title (中): 具有错误修复和容错功能的集成电路
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Application No.: US14143065Application Date: 2013-12-30
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Publication No.: US09021298B2Publication Date: 2015-04-28
- Inventor: Shidhartha Das , David Michael Bull , Emre Ozer
- Applicant: ARM Limited
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Priority: GB0803491.0 20080226
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/07 ; G01R31/3181 ; G06F11/10 ; G06F11/16

Abstract:
An integrated circuit is provided with error detection circuitry and error repair circuitry. Error tolerance circuitry is responsive to a control parameter to selectively disable the error repair circuitry. The control parameter is dependent on the processing performed within the circuit. For example, the control parameter may be generated in dependence upon the program instruction being executed, the output signal value which is in error, the previous behavior of the circuit or in other ways.
Public/Granted literature
- US20140115376A1 INTEGRATED CIRCUIT WITH ERROR REPAIR AND FAULT TOLERANCE Public/Granted day:2014-04-24
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