发明授权
US09031232B2 Bit sequence generation apparatus and bit sequence generation method
有权
比特序列生成装置和比特序列生成方法
- 专利标题: Bit sequence generation apparatus and bit sequence generation method
- 专利标题(中): 比特序列生成装置和比特序列生成方法
-
申请号: US13522439申请日: 2010-01-15
-
公开(公告)号: US09031232B2公开(公告)日: 2015-05-12
- 发明人: Daisuke Suzuki
- 申请人: Daisuke Suzuki
- 申请人地址: JP Tokyo
- 专利权人: Mitsubishi Electric Corporation
- 当前专利权人: Mitsubishi Electric Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Oblon, McClelland, Maier & Neustadt, L.L.P.
- 国际申请: PCT/JP2010/050422 WO 20100115
- 国际公布: WO2011/086688 WO 20110721
- 主分类号: G06F21/00
- IPC分类号: G06F21/00 ; H03K3/84 ; H04L9/08 ; G06F7/58
摘要:
A bit sequence generation apparatus includes a glitch generating circuit that generates a glitch, a sampling circuit that samples the glitch waveform generated by the glitch generating circuit, and a glitch shape determination circuit that generates 1-bit data indicating either 1 or 0, based on the glitch waveform sampled by the sampling circuit, and generates a bit sequence composed of a plurality of generated 1-bit data. The bit sequence generation apparatus can provide a PUF circuit that is able to generate highly randomized secret information even in a device with a low degree of freedom of alignment and wiring and that does not violate the design rules.
公开/授权文献
信息查询