Invention Grant
US09040403B2 Methods for fabricating integrated circuits having gate to active and gate to gate interconnects
有权
用于制造具有栅极到栅极到栅极互连的集成电路的方法
- Patent Title: Methods for fabricating integrated circuits having gate to active and gate to gate interconnects
- Patent Title (中): 用于制造具有栅极到栅极到栅极互连的集成电路的方法
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Application No.: US14244611Application Date: 2014-04-03
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Publication No.: US09040403B2Publication Date: 2015-05-26
- Inventor: Thilo Scheiper , Stefan Flachowsky , Andy Wei
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/4763 ; H01L29/66 ; H01L21/762 ; H01L21/768

Abstract:
Methods are provided for fabricating an integrated circuit that includes gate to active contacts. One method includes forming a dummy gate structure including a dummy gate electrode having sidewalls and overlying a semiconductor substrate and first and second sidewall spacers on the sidewalls of the dummy gate electrode. The method includes removing the dummy gate electrode to form a trench bounded by the first and second sidewall spacers. The method removes an upper portion of the first sidewall spacer and deposits a layer of metal in the trench and over a remaining portion of the first sidewall spacer to form a gate electrode and an interconnect.
Public/Granted literature
- US20140220759A1 METHODS FOR FABRICATING INTEGRATED CIRCUITS HAVING GATE TO ACTIVE AND GATE TO GATE INTERCONNECTS Public/Granted day:2014-08-07
Information query
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