发明授权
US09041207B2 Method to increase I/O density and reduce layer counts in BBUL packages
有权
增加BBUL封装中I / O密度和减少层数的方法
- 专利标题: Method to increase I/O density and reduce layer counts in BBUL packages
- 专利标题(中): 增加BBUL封装中I / O密度和减少层数的方法
-
申请号: US13931006申请日: 2013-06-28
-
公开(公告)号: US09041207B2公开(公告)日: 2015-05-26
- 发明人: Digvijay A. Raorane , Sairam Agraharam
- 申请人: Digvijay A. Raorane , Sairam Agraharam
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: H01L23/528
- IPC分类号: H01L23/528 ; H01L23/00
摘要:
An apparatus including a die including a dielectric material on a device side, an insulating layer surrounding a die area and embedding a thickness dimension of the die; and a carrier including a plurality of layers of conductive material disposed on the device side of the die, a first one of the layers of conductive materials being formed on the insulating layer and patterned into traces at least a portion of which are connected to respective contact points on the die. A method including disposing a die on a sacrificial substrate with a device side of the die opposite the sacrificial substrate; disposing a mold on the sacrificial substrate around; introducing an insulating material into a chase of the mold; removing the mold; forming a carrier on the insulating material adjacent a device side of a die; and separating the die and the carrier from the sacrificial substrate.
公开/授权文献
信息查询
IPC分类: