Invention Grant
- Patent Title: Counter operation in a state machine lattice
- Patent Title (中): 在状态机格子中的计数器操作
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Application No.: US14143398Application Date: 2013-12-30
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Publication No.: US09058465B2Publication Date: 2015-06-16
- Inventor: Harold B Noyes , David R. Brown , Paul Glendenning
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder, P.C.
- Main IPC: G06F7/38
- IPC: G06F7/38 ; G06F7/00 ; H01L25/00 ; G05B19/045 ; G06F15/82 ; G06F21/56 ; G06N5/04

Abstract:
Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may include a counter suitable for counting a number of times a programmable element in the lattice detects a condition. The counter may be configured to output in response to counting the condition was detected a certain number of times. For example, the counter may be configured to output in response to determining a condition was detected at least (or no more than) the certain number of times, determining the condition was detected exactly the certain number of times, or determining the condition was detected within a certain range of times. The counter may be coupled to other counters in the device for determining high-count operations and/or certain quantifiers.
Public/Granted literature
- US20140115299A1 COUNTER OPERATION IN A STATE MACHINE LATTICE Public/Granted day:2014-04-24
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