Invention Grant
US09076863B2 Semiconductor structure with a doped region between two deep trench isolation structures
有权
半导体结构在两个深沟槽隔离结构之间具有掺杂区域
- Patent Title: Semiconductor structure with a doped region between two deep trench isolation structures
- Patent Title (中): 半导体结构在两个深沟槽隔离结构之间具有掺杂区域
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Application No.: US13944864Application Date: 2013-07-17
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Publication No.: US09076863B2Publication Date: 2015-07-07
- Inventor: Takehito Tamura , Binghua Hu , Sameer Pendharkar , Guru Mathur
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Frank Cimino
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/762 ; H01L29/06
Abstract:
The density of a transistor array is increased by forming one or more deep trench isolation structures in a semiconductor material. The deep trench isolation structures laterally surround the transistors in the array. The deep trench isolation structures limit the lateral diffusion of dopants and the lateral movement of charge carriers.
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