Invention Grant
US09082485B2 Apparatuses and methods including memory array and data line architecture 有权
包括存储器阵列和数据线架构的设备和方法

Apparatuses and methods including memory array and data line architecture
Abstract:
Some embodiments include apparatus and methods having memory cells located in different device levels of a device, at least a portion of a transistor located in a substrate of the device, and a data line coupled to the transistor and the memory cells. The data line can be located between the transistor and the memory cells. Other embodiments including additional apparatus and methods are described.
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