A pixel readout circuit including at least first, second and third memory locations. During an integration period of a pixel, the pixel readout circuit repeatedly samples the pixel output level during the integration period, stores the first sample in the first memory location, and stores each subsequent sample in memory locations other than the first memory location. Each sample is stored with a time corresponding to when that sample was taken, such that at any one time subsequent to the first three samples having been stored, at least the first sample and the two most recent samples are stored. Also disclosed is a corresponding method of reading out of a pixel output over an undefined integration period.