公开(公告)号：US20130155282A1

公开(公告)日：2013-06-20

申请号：US13710198

申请日：2012-12-10

Applicant: STMicroelectronics (R&D) Ltd.

Inventor： Robert Golding

IPC: H01L27/146 ,  H04N5/335

CPC classification number: H01L27/14609 ,  G01N21/645 ,  H04N5/335 ,  H04N5/35572 ,  H04N5/378

Abstract: A pixel readout circuit including at least first, second and third memory locations. During an integration period of a pixel, the pixel readout circuit repeatedly samples the pixel output level during the integration period, stores the first sample in the first memory location, and stores each subsequent sample in memory locations other than the first memory location. Each sample is stored with a time corresponding to when that sample was taken, such that at any one time subsequent to the first three samples having been stored, at least the first sample and the two most recent samples are stored. Also disclosed is a corresponding method of reading out of a pixel output over an undefined integration period.

Abstract translation: 一种像素读出电路，至少包括第一，第二和第三存储单元。 在像素的积分期间，像素读出电路在积分期间反复取样像素输出电平，将第一样本存储在第一存储器位置，并将每个后续样本存储在第一存储单元以外的存储位置。 存储每个样品的时间对应于该采样时间，使得在存储了前三个样品之后的任何一个时间，至少存储了第一样品和两个最近的样品。 还公开了一种在未定义的积分周期内读出像素输出的相应方法。

公开(公告)号：US09087756B2

公开(公告)日：2015-07-21

申请号：US13710198

申请日：2012-12-10

Applicant: STMicroelectronics (R&D) Ltd.

Inventor： Robert Golding

IPC: H04N5/76 ,  H04N9/64 ,  H04N5/335 ,  H01L27/146 ,  H04N5/355 ,  H04N5/378 ,  G01N21/64

CPC classification number: H01L27/14609 ,  G01N21/645 ,  H04N5/335 ,  H04N5/35572 ,  H04N5/378

Abstract: A pixel readout circuit including at least first, second and third memory locations. During an integration period of a pixel, the pixel readout circuit repeatedly samples the pixel output level during the integration period, stores the first sample in the first memory location, and stores each subsequent sample in memory locations other than the first memory location. Each sample is stored with a time corresponding to when that sample was taken, such that at any one time subsequent to the first three samples having been stored, at least the first sample and the two most recent samples are stored. Also disclosed is a corresponding method of reading out of a pixel output over an undefined integration period.

Abstract translation: 一种像素读出电路，至少包括第一，第二和第三存储单元。 在像素的积分期间，像素读出电路在积分期间反复取样像素输出电平，将第一样本存储在第一存储器位置，并将每个后续样本存储在第一存储单元以外的存储位置。 存储每个样品的时间对应于该采样时间，使得在存储了前三个样品之后的任何一个时间，至少存储了第一样品和两个最近的样品。 还公开了一种在未定义的积分周期内读出像素输出的相应方法。