发明授权
US09099402B2 Integrated circuit structure having arrays of small, closely spaced features
有权
集成电路结构具有小的，紧密间隔的特征的阵列
- 专利标题： Integrated circuit structure having arrays of small, closely spaced features
- 专利标题（中）： 集成电路结构具有小的，紧密间隔的特征的阵列
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申请号： US13475109申请日： 2012-05-18
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公开(公告)号： US09099402B2公开(公告)日： 2015-08-04
- 发明人: Mirzafer Abatchev , Gurtej Sandhu
- 申请人： Mirzafer Abatchev , Gurtej Sandhu
- 申请人地址： US ID Boise
- 专利权人： MICRON TECHNOLOGY, INC.
- 当前专利权人： MICRON TECHNOLOGY, INC.
- 当前专利权人地址： US ID Boise
- 代理机构： Knobbe, Martens, Olson & Bear LLP
- 主分类号： H01L21/48
- IPC分类号： H01L21/48 ; H01L21/52 ; H01L21/40 ; H01L21/311 ; H01L21/033 ; H01L27/105
摘要：
Methods of forming arrays of small, densely spaced holes or pillars for use in integrated circuits are disclosed. Various pattern transfer and etching steps can be used, in combination with pitch-reduction techniques, to create densely-packed features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed, pitch-reduced patterns of crossing elongate features that can be consolidated into a single layer.
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