Invention Grant
US09105643B2 Bit cell with double patterned metal layer structures 有权
具有双重图案化金属层结构的位单元

Bit cell with double patterned metal layer structures
Abstract:
An approach for providing SRAM bit cells with double patterned metal layer structures is disclosed. Embodiments include: providing, via a first patterning process, a word line structure, a ground line structure, a power line structure, or a combination thereof; and providing, via a second patterning process, a bit line structure proximate the word line structure, the ground line structure, the power line structure, or a combination thereof. Embodiments include: providing a first landing pad as the word line structure, and a second landing pad as the ground line structure; and providing the first landing pad to have a first tip edge and a first side edge, and the second landing pad to have a second tip edge and a second side edge, wherein the first side edge faces the second side edge.
Public/Granted literature
Information query
Patent Agency Ranking
0/0