Invention Grant
- Patent Title: Method for manufacturing a field effect transistor of a non-planar type
- Patent Title (中): 制造非平面型场效应晶体管的方法
-
Application No.: US14521083Application Date: 2014-10-22
-
Publication No.: US09105746B2Publication Date: 2015-08-11
- Inventor: Min-Soo Kim , Guillaume Boccardi , Soon Aik Chew , Naoto Horiguchi
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Agency: McDonnell Boehnen Hulbert & Berghoff LLP
- Priority: EP13189609 20131022
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/66 ; H01L29/06 ; H01L21/02 ; H01L21/762 ; H01L29/78 ; H01L29/10

Abstract:
A method for manufacturing a field effect transistor of a non-planar type, comprising providing a substrate having an initially planar front main surface, and providing shallow trench isolation structures in the substrate on the front surface, thereby defining a plurality of fin structures in the substrate between the shallow trench isolation structures. Top surfaces of the shallow trench isolation structures and the fin structures abut on a common planar surface, and sidewalls of the fin structures are fully concealed by the shallow trench isolation structures. The method also includes forming a dummy gate structure over a central portion of the plurality of fin structures on the common planar surface, forming dielectric spacer structures around the dummy gate structure, and removing the dummy gate structure, thereby leaving a gate trench defined by the dielectric spacer structures. Further, the method includes removing an upper portion of at least two shallow trench isolation structures to expose at least a portion of the sidewalls of the fin structures within the gate trench, and forming a final gate stack in the gate trench.
Public/Granted literature
- US20150111351A1 Method for Manufacturing a Field Effect Transistor of a Non-Planar Type Public/Granted day:2015-04-23
Information query
IPC分类: