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US09110596B2 Fast-wake memory 有权
快速唤醒记忆

Fast-wake memory
Abstract:
A memory device is transitioned to a low-power mode in which an active-mode resource required to receive memory access commands from a memory controller at a first command-signaling frequency of the memory device is disabled. A first memory access command, transmitted by the memory controller, is received within the memory device using an alternative signaling resource during a transitional interval in which the active-mode resource is re-enabled.
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