发明授权
- 专利标题： Methods of forming fine patterns in integrated circuit devices
- 专利标题（中）： 在集成电路器件中形成精细图案的方法
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申请号： US13470773申请日： 2012-05-14
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公开(公告)号： US09117654B2公开(公告)日： 2015-08-25
- 发明人: Young-Ho Lee , Jae-Kwan Park , Jae-Hwang Sim , Sang-Yong Park
- 申请人： Young-Ho Lee , Jae-Kwan Park , Jae-Hwang Sim , Sang-Yong Park
- 申请人地址： KR
- 专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人地址： KR
- 代理机构： Myers Bigel Sibley & Sajovec, PA
- 优先权： KR10-2008-0103721 20081022
- 主分类号： H01L21/467
- IPC分类号： H01L21/467 ; H01L27/02 ; H01L21/033 ; H01L21/308 ; H01L21/3213 ; H01L21/762 ; H01L23/544 ; H01L27/115 ; H01L27/105
摘要：
A method of fabricating an integrated circuit device includes forming first and second mask structures on respective first and second regions of a feature layer. Each of the first and second mask structures includes a dual mask pattern and an etch mask pattern thereon having an etch selectivity relative to the dual mask pattern. The etch mask patterns of the first and second mask structures are etched to partially remove the etch mask pattern from the second mask structure. Spacers are formed on opposing sidewalls of the first and second mask structures. The first mask structure is selectively removed from between the spacers in the first region to define a first mask pattern including the opposing sidewall spacers with a void therebetween in the first region, and a second mask pattern including the opposing sidewall spacers with the second mask structure therebetween in the second region.
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