Methods of forming stressed fin channel structures for FinFET semiconductor devices

Invention Grant

US09117930B2 Methods of forming stressed fin channel structures for FinFET semiconductor devices 有权

Title translation: 形成用于FinFET半导体器件的应力鳍式通道结构的方法

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Patent Title: Methods of forming stressed fin channel structures for FinFET semiconductor devices
Patent Title (中): 形成用于FinFET半导体器件的应力鳍式通道结构的方法
Application No.: US13960200

Application Date: 2013-08-06
Publication No.: US09117930B2

Publication Date: 2015-08-25
Inventor: Vimal K. Kamineni , Derya Deniz , Abner Bello , Abhijeet Paul , Robert J. Miller , William J. Taylor, Jr.
Applicant: GLOBALFOUNDRIES Inc.
Applicant Address: KY Grand Cayman
Assignee: GLOBALFOUNDRIES Inc.
Current Assignee: GLOBALFOUNDRIES Inc.
Current Assignee Address: KY Grand Cayman
Agency: Amerson Law Firm, PLLC
Main IPC: H01L21/8234
IPC: H01L21/8234 ; H01L21/8238 ; H01L27/092

Methods of forming stressed fin channel structures for FinFET semiconductor devices

Abstract:

One method disclosed herein includes forming a first stressed conductive layer within the trenches of a FinFET device and above the upper surface of a fin, forming a second stressed conductive layer above the first stressed conductive layer, removing a portion of the second stressed conductive layer and a portion of the first stressed conductive layer that is positioned above the fin while leaving portions of the first stressed conductive layer positioned within the trenches, and forming a conductive layer above the second stressed conductive layer, the upper surface of the fin and the portions of the first stressed conductive layer positioned within the trenches.

Abstract(Chinese):

本文公开的一种方法包括在FinFET器件的沟槽内并在鳍的上表面上方形成第一应力导电层，在第一应力导电层上形成第二应力导电层，去除第二应力导电层的一部分，所述第一应力导电层的位于所述鳍片上方的部分，同时留下位于所述沟槽内的所述第一应力导电层的部分，并且在所述第二应力导电层上方形成导电层，所述翅片的上表面和第一应力导电层位于沟槽内。

Public/Granted literature

US20150041906A1 METHODS OF FORMING STRESSED FIN CHANNEL STRUCTURES FOR FINFET SEMICONDUCTOR DEVICES Public/Granted day:2015-02-12

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Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺