Invention Grant
- Patent Title: Selective cache fills in response to write misses
- Patent Title (中): 选择性缓存响应于写入错误而填满
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Application No.: US13854724Application Date: 2013-04-01
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Publication No.: US09128856B2Publication Date: 2015-09-08
- Inventor: Mithuna Thottethodi , Yasuko Eckert , Srilatha Manne
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee Address: US CA Sunnyvale
- Agency: Park, Vaughan, Fleming & Dowler LLP
- Main IPC: G06F12/08
- IPC: G06F12/08
Abstract:
A cache memory receives a request to perform a write operation. The request specifies an address. A first determination is made that the cache memory does not include a cache line corresponding to the address. A second determination is made that the address is between a previous value of a stack pointer and a current value of the stack pointer. A third determination is made that a write history indicator is set to a specified value. The write operation is performed in the cache memory without waiting for a cache fill corresponding to the address to be performed, in response to the first, second, and third determinations.
Public/Granted literature
- US20140297961A1 SELECTIVE CACHE FILLS IN RESPONSE TO WRITE MISSES Public/Granted day:2014-10-02
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