Invention Grant
- Patent Title: Three dimensional memory structure
- Patent Title (中): 三维记忆结构
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Application No.: US13786925Application Date: 2013-03-06
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Publication No.: US09129859B2Publication Date: 2015-09-08
- Inventor: Haitao Liu , Chandra V. Mouli , Krishna K. Parat , Jie Sun , Guangyu Huang
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alpine Technology Law Group LLC
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L27/115 ; H01L29/66 ; H01L29/788 ; H01L29/792

Abstract:
A method to fabricate a three dimensional memory structure includes forming an array stack, creating a layer of sacrificial material above the array stack, etching a hole through the layer of sacrificial material and the array stack, creating a pillar of semiconductor material in the hole to form at least two vertically stacked flash memory cells that use the pillar as a common body, removing at least some of the layer of sacrificial material around the pillar to expose a portion of the pillar, and forming a field effect transistor (FET) using the portion of the pillar as the body of the FET.
Public/Granted literature
- US20140252363A1 THREE DIMENSIONAL MEMORY STRUCTURE Public/Granted day:2014-09-11
Information query
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