Invention Grant
US09142431B2 Semiconductor device and method of forming base substrate with cavities formed through etch-resistant conductive layer for bump locking
有权
半导体器件和形成基底的基底的方法,所述基底通过用于凹凸锁定的耐蚀刻导电层形成
- Patent Title: Semiconductor device and method of forming base substrate with cavities formed through etch-resistant conductive layer for bump locking
- Patent Title (中): 半导体器件和形成基底的基底的方法,所述基底通过用于凹凸锁定的耐蚀刻导电层形成
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Application No.: US13622297Application Date: 2012-09-18
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Publication No.: US09142431B2Publication Date: 2015-09-22
- Inventor: Reza A. Pagaila
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/56 ; H01L21/48 ; H01L23/495 ; H01L23/00 ; H01L25/065 ; H01L25/00 ; H01L23/31

Abstract:
A semiconductor device has a base substrate with first and second etch-resistant conductive layers formed over opposing surfaces of the base substrate. First cavities are etched in the base substrate through an opening in the first conductive layer. The first cavities have a width greater than a width of the opening in the first conductive layer. Second cavities are etched in the base substrate between portions of the first or second conductive layer. A semiconductor die is mounted over the base substrate with bumps disposed over the first conductive layer. The bumps are reflowed to electrically connect to the first conductive layer and cause bump material to flow into the first cavities. An encapsulant is deposited over the die and base substrate. A portion of the base substrate is removed down to the second cavities to form electrically isolated base leads between the first and second conductive layers.
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