Invention Grant
- Patent Title: Recessed and embedded die coreless package
- Patent Title (中): 嵌入式嵌入式无芯封装
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Application No.: US14254474Application Date: 2014-04-16
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Publication No.: US09147669B2Publication Date: 2015-09-29
- Inventor: John Guzek
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Winkle, PLLC
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/00 ; H01L21/683 ; H01L23/498 ; H01L23/538 ; H01L25/10 ; H01L25/16

Abstract:
Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a cavity in a plating material to hold a die, attaching the die in the cavity, forming a dielectric material adjacent the die, forming vias in the dielectric material adjacent the die, forming PoP lands in the vias, forming interconnects in the vias, and then removing the plating material to expose the PoP lands and die, wherein the die is disposed above the PoP lands.
Public/Granted literature
- US20140357024A1 RECESSED AND EMBEDDED DIE CORELESS PACKAGE Public/Granted day:2014-12-04
Information query
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