Invention Grant
- Patent Title: A/D conversion circuit and solid-state imaging device
- Patent Title (中): A / D转换电路和固态成像装置
-
Application No.: US13887939Application Date: 2013-05-06
-
Publication No.: US09166613B2Publication Date: 2015-10-20
- Inventor: Takanori Tanaka
- Applicant: OLYMPUS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: OLYMPUS CORPORATION
- Current Assignee: OLYMPUS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2012-108365 20120510
- Main IPC: H03M1/56
- IPC: H03M1/56 ; H03M1/34 ; H04N5/335 ; H04N5/378 ; H03M1/12

Abstract:
An A/D conversion circuit and a solid-state imaging device are able to reduce current consumption, and two input terminals of a NAND element included in a latch circuit receive a corresponding one of a plurality of clock signals and an enable signal. The enable signal is not input to the NAND element before an end timing of A/D conversion, and is input to the NAND element at the end timing of the A/D conversion and at a timing at which latching is performed. The latch circuit latches no clock signal when the enable signal is not input.
Public/Granted literature
- US20130299676A1 A/D CONVERSION CIRCUIT AND SOLID-STATE IMAGING DEVICE Public/Granted day:2013-11-14
Information query
IPC分类: