Invention Grant
US09170881B2 Solid state device coding architecture for chipkill and endurance improvement
有权
固态设备编码架构,用于芯片杀戮和耐力改进
- Patent Title: Solid state device coding architecture for chipkill and endurance improvement
- Patent Title (中): 固态设备编码架构,用于芯片杀戮和耐力改进
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Application No.: US14266702Application Date: 2014-04-30
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Publication No.: US09170881B2Publication Date: 2015-10-27
- Inventor: Marcus Marrow , Rajiv Agarwal
- Applicant: SK hynix memory solutions inc.
- Applicant Address: US CA San Jose
- Assignee: SK hynix memory solutions inc.
- Current Assignee: SK hynix memory solutions inc.
- Current Assignee Address: US CA San Jose
- Agency: Van Pelt, Yi & James LLP
- Main IPC: H03M13/00
- IPC: H03M13/00 ; G06F11/10 ; H03M13/29 ; H03M13/11 ; H03M13/15

Abstract:
A first decoder performs decoding on each data set in a first plurality of data sets using a first code; each data set in the first plurality is stored on a different chip. It is determined if the first decoding is successful; if not, a second decoder performs a second decoding on each data set in a second plurality of data sets using a second code; each data set in the second plurality includes at least some data, after the first decoding using the first code, from each data set in the first plurality. The first decoder performs a third decoding on each data set in the first plurality using the first code, where each data set in the first plurality includes at least some data, after the second decoding using the second code, from each data set in the second plurality.
Public/Granted literature
- US20140325318A1 SOLID STATE DEVICE CODING ARCHITECTURE FOR CHIPKILL AND ENDURANCE IMPROVEMENT Public/Granted day:2014-10-30
Information query
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