发明授权
US09170881B2 Solid state device coding architecture for chipkill and endurance improvement
有权
固态设备编码架构，用于芯片杀戮和耐力改进
- 专利标题： Solid state device coding architecture for chipkill and endurance improvement
- 专利标题（中）： 固态设备编码架构，用于芯片杀戮和耐力改进
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申请号： US14266702申请日： 2014-04-30
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公开(公告)号： US09170881B2公开(公告)日： 2015-10-27
- 发明人: Marcus Marrow , Rajiv Agarwal
- 申请人： SK hynix memory solutions inc.
- 申请人地址： US CA San Jose
- 专利权人： SK hynix memory solutions inc.
- 当前专利权人： SK hynix memory solutions inc.
- 当前专利权人地址： US CA San Jose
- 代理机构： Van Pelt, Yi & James LLP
- 主分类号： H03M13/00
- IPC分类号： H03M13/00 ; G06F11/10 ; H03M13/29 ; H03M13/11 ; H03M13/15
摘要：
A first decoder performs decoding on each data set in a first plurality of data sets using a first code; each data set in the first plurality is stored on a different chip. It is determined if the first decoding is successful; if not, a second decoder performs a second decoding on each data set in a second plurality of data sets using a second code; each data set in the second plurality includes at least some data, after the first decoding using the first code, from each data set in the first plurality. The first decoder performs a third decoding on each data set in the first plurality using the first code, where each data set in the first plurality includes at least some data, after the second decoding using the second code, from each data set in the second plurality.