Invention Grant
US09171832B2 Analog switch with high bipolar blocking voltage in low voltage CMOS process 有权
在低电压CMOS工艺中具有高双极性阻断电压的模拟开关

Analog switch with high bipolar blocking voltage in low voltage CMOS process
Abstract:
The disclosed technology relates to an apparatus for protection against transient electrical events. In one aspect, the apparatus includes an analog switch with high bipolar blocking voltage comprising a first p-type well region, a second p-type well region, a first n-type well region disposed between the first and second p-type well regions, and a deep n-type well region surrounding the first p-type well region, the second p-type well region, and the first n-type well region. The apparatus additionally includes a first native n-type region disposed between the first p-type well region the n-type well region and a second native n-type region disposed between the second p-type well region and n-type well region. The apparatus is configured such that the first p-type well region serves as an emitter/collector of a bidirectional PNP bipolar transistor. In addition, the apparatus is configured such that the first native n-type region, the first n-type well region, and the second native n-type region serves as a base of the bidirectional PNP bipolar transistor. Furthermore, the apparatus is configured such that the second p-type well region is configured as a collector/emitter of the bidirectional PNP bipolar transistor.
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