Apparatus and methods for high-speed drivers

    公开(公告)号:US11640367B1

    公开(公告)日:2023-05-02

    申请号:US17450585

    申请日:2021-10-12

    发明人: Wei-Hung Chen

    IPC分类号: G06F13/42

    摘要: Apparatus and methods for high-speed drivers are provided herein. In certain embodiments, a high-speed driver multiplexes two or more data streams. The high-speed driver is implemented with a mux-then-driver topology that provides multiplexing in a predriver circuit. Thus, the multiplexer is eliminated from the full rate output path to relax timing. Driver amplitude control schemes are also disclosed in which a controllable driver includes a group of differential series source transistor (SST) driver slices that are connected in parallel with one another to drive a pair of output terminals, and a group of attenuator slices that are connected in parallel with one another across the pair of output terminals. Additionally, the controllable driver includes a control circuit that activates an attenuator slice for each SST driver slice that is decommissioned to provide output amplitude control.

    ANALOG-TO-DIGITAL CONVERSION CIRCUIT WITH IMPROVED LINEARITY

    公开(公告)号:US20230117529A1

    公开(公告)日:2023-04-20

    申请号:US18066053

    申请日:2022-12-14

    IPC分类号: H03M1/46 H03M1/12

    摘要: Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.

    Multi quantizer loops for delta-sigma converters

    公开(公告)号:US11621722B2

    公开(公告)日:2023-04-04

    申请号:US17459020

    申请日:2021-08-27

    IPC分类号: H03M3/00

    摘要: The number of bits in the quantizer can be decoupled from the number of bits in the feedback digital-to-analog converter (DAC) A delta-sigma analog-to-digital converter circuit can include a first quantizer to generate an output having a first number of bits and a second quantizer coupled to an output of the first quantizer, where the second quantizer can receive the output of the first quantizer and generate an output having a second number of bits. The feedback DAC can be coupled to the second quantizer to receive a representation of the output of the second quantizer, where the output of the feedback digital-to-analog converter circuit has the second number of bits. These techniques can reduce the area of the feedback DAC, e.g., 4 or 5 bits, and the techniques can achieve a higher maximum stable amplitude (MSA) because it is effectively a second order loop.

    Sensor package
    8.
    发明授权

    公开(公告)号:US11604084B2

    公开(公告)日:2023-03-14

    申请号:US17231995

    申请日:2021-04-15

    IPC分类号: G01D11/24 B81B7/00

    摘要: A sensor package is disclosed. The sensor package can include a housing that at least partially defines a flow channel. The sensor package can also include an electrically conductive spacer that is disposed on a surface of the housing in the flow channel. The sensor package can further include a sensor die that is disposed in and exposed to the flow channel. The sensor die electrically attached to the spacer such that the sensor die is elevated relative to the surface of the housing.

    Dual-phase hybrid converter
    9.
    发明授权

    公开(公告)号:US11594956B2

    公开(公告)日:2023-02-28

    申请号:US17152065

    申请日:2021-01-19

    IPC分类号: H02M3/07

    摘要: A dual-phase hybrid DC-DC converter using a switched-capacitor technique is described. The dual-phase hybrid converter can reduce the volt-seconds on the inductors of the converter, which can allow for a reduction in the size of the inductors. In addition, the dual-phase hybrid converter can utilize inductors as current sources to charge and discharge the flying capacitors, which can reduce the size of the mid capacitor and increase solution density. Because charging and discharging are performed by inductors, the dual-phase hybrid converter can eliminate the capacitor-to-capacitor charge transfer. As such, the dual-phase hybrid converter does not need high capacitance to achieve high efficiency operation, which can further increase solution density.

    PRECISION DYNAMIC RANGE EXPANSION FOR CURRENT MEASUREMENT

    公开(公告)号:US20230013695A1

    公开(公告)日:2023-01-19

    申请号:US17376850

    申请日:2021-07-15

    摘要: A measurement circuit comprises an input terminal to receive a current signal, a first circuit branch coupled to the first terminal and including one or more circuit elements to receive a portion of the current signal, a second circuit branch coupled to the first terminal and including one or more additional circuit elements to receive another portion of the current signal, a nonlinear circuit element coupling the first circuit branch to the second circuit branch, and a quantization circuit configured to produce an input current measurement of current in the first and second circuit branches, and to include current in the second circuit branch in the input current measurement according to a magnitude of the input current signal.