Invention Grant
- Patent Title: Semiconductor package having embedded semiconductor elements
- Patent Title (中): 具有嵌入式半导体元件的半导体封装
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Application No.: US14013420Application Date: 2013-08-29
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Publication No.: US09177859B2Publication Date: 2015-11-03
- Inventor: Yan-Heng Chen , Chun-Tang Lin , Yan-Yi Liao , Hung-Wen Liu , Chieh-Yuan Chi , Hsi-Chang Hsu
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW102116654U 20130510
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/13 ; H01L23/538 ; H01L21/768 ; H01L23/498 ; H01L21/48 ; H01L25/065 ; H01L23/00 ; H01L21/56

Abstract:
A semiconductor package is disclosed, which includes: a carrier having at least an opening; a plurality of conductive traces formed on the carrier and in the opening; a first semiconductor element disposed in the opening and electrically connected to the conductive traces; a second semiconductor element disposed on the first semiconductor element in the opening; and a redistribution layer structure formed on the carrier and the second semiconductor element for electrically connecting the conductive traces and the second semiconductor element. Since the semiconductor elements are embedded and therefore positioned in the opening of the carrier, the present invention eliminates the need to perform a molding process before forming the redistribution layer structure and prevents the semiconductor elements from displacement.
Public/Granted literature
- US20140332976A1 SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF Public/Granted day:2014-11-13
Information query
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