Invention Grant
- Patent Title: Pattern selection for full-chip source and mask optimization
- Patent Title (中): 全片选择源码和掩码优化
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Application No.: US13888816Application Date: 2013-05-07
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Publication No.: US09183324B2Publication Date: 2015-11-10
- Inventor: Hua-Yu Liu
- Applicant: ASML NETHERLANDS B.V.
- Applicant Address: NL Veldhoven
- Assignee: ASML NETHERLANDS B.V.
- Current Assignee: ASML NETHERLANDS B.V.
- Current Assignee Address: NL Veldhoven
- Agency: Pillsbury Winthrop Shaw Pittman LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G03F1/00 ; G03F1/36 ; G03F7/20

Abstract:
The present invention relates to lithographic apparatuses and processes, and more particularly to tools for co-optimizing illumination sources and masks for use in lithographic apparatuses and processes. According to certain aspects, the present invention enables full chip pattern coverage while lowering the computation cost by intelligently selecting a small set of critical design patterns from the full set of clips to be used in source and mask optimization. Optimization is performed only on these selected patterns to obtain an optimized source. The optimized source is then used to optimize the mask (e.g. using OPC and manufacturability verification) for the full chip, and the process window performance results are compared. If the results are comparable to conventional full-chip SMO, the process ends, otherwise various methods are provided for iteratively converging on the successful result.
Public/Granted literature
- US20130311958A1 PATTERN SELECTION FOR FULL-CHIP SOURCE AND MASK OPTIMIZATION Public/Granted day:2013-11-21
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