Invention Grant
- Patent Title: Semiconductor package
- Patent Title (中): 半导体封装
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Application No.: US14585575Application Date: 2014-12-30
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Publication No.: US09184107B2Publication Date: 2015-11-10
- Inventor: Tai-Yu Chen , Chung-Fa Lee , Wen-Sung Hsu , Shih-Chin Lin
- Applicant: MediaTek Inc.
- Applicant Address: TW Hsin-Chu
- Assignee: MEDIATEK INC.
- Current Assignee: MEDIATEK INC.
- Current Assignee Address: TW Hsin-Chu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L23/373
- IPC: H01L23/373 ; H01L23/36 ; H01L23/433 ; H01L23/498 ; H01L23/29 ; H01L23/31 ; H01L23/367 ; H01L23/00

Abstract:
A semiconductor package with reduced warpage problem is provided, including: a circuit board, having opposing first and second surfaces; a semiconductor chip, formed over a center portion of the first surface of the circuit board, having a first cross sectional dimension; a spacer, formed over a center portion of the semiconductor chip, having a second cross sectional dimension less than that of the first cross sectional dimension; an encapsulant layer, formed over the circuit board, covering the semiconductor chip and surrounding the spacer; a heat spreading layer, formed over the encapsulant layer and the spacer; and a plurality of solder balls, formed over the second surface of the circuit board, wherein a ratio between the first cross sectional dimension and the second cross sectional dimension is about 1:2-1:6.
Public/Granted literature
- US20150115429A1 SEMICONDUCTOR PACKAGE Public/Granted day:2015-04-30
Information query
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