Invention Grant
US09196334B2 Hierarchical memory magnetoresistive random-access memory (MRAM) architecture
有权
分层存储器磁阻随机存取存储器(MRAM)架构
- Patent Title: Hierarchical memory magnetoresistive random-access memory (MRAM) architecture
- Patent Title (中): 分层存储器磁阻随机存取存储器(MRAM)架构
-
Application No.: US13842122Application Date: 2013-03-15
-
Publication No.: US09196334B2Publication Date: 2015-11-24
- Inventor: Seung H. Kang , Xiaochun Zhu
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Donald D. Min
- Main IPC: G11C11/16
- IPC: G11C11/16 ; H01L43/02 ; G06F12/08

Abstract:
A hierarchical memory magnetoresistive random-access memory architecture is disclosed. In a particular embodiment, an apparatus includes a first magnetoresistive random-access memory (MRAM) device corresponding to a first level in a hierarchical memory system. The apparatus includes a second MRAM device corresponding to a second level in the hierarchical memory system. The first MRAM device has a first access latency and includes a first magnetic tunnel junction (MTJ) device having a first physical configuration. The second MRAM device has a second access latency and includes a second MTJ device having a second physical configuration. The first access latency is less than the second access latency.
Public/Granted literature
- US20130279244A1 HIERARCHICAL MEMORY MAGNETORESISTIVE RANDOM-ACCESS MEMORY (MRAM) ARCHITECTURE Public/Granted day:2013-10-24
Information query