Invention Grant
- Patent Title: Selectable phase or cycle jitter detector
- Patent Title (中): 可选相位或周期抖动检测器
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Application No.: US13670779Application Date: 2012-11-07
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Publication No.: US09207705B2Publication Date: 2015-12-08
- Inventor: Greg M Hess , James E Burnette, II
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G06F1/04 ; G01R31/3185 ; G01R31/317 ; H03M1/20 ; H03M1/08

Abstract:
Embodiments of a jitter detection circuit are disclosed that may allow for detecting both cycle and phase jitter in a clock distribution network. The jitter detection circuit may include a phase selector, a data generator, a delay chain, a logic circuit, and clocked storage elements. The phase selector may be operable to select a clock phase to be used for the launch clock, and the data generator may be operable to generate a data signal responsive to the launch clock. The delay chain may generate a plurality of outputs dependent upon the data signal, and the clocked storage elements may be operable to capture the plurality of outputs from the delay chain, which may be compared to expected data by the logic circuit.
Public/Granted literature
- US20140129868A1 SELECTABLE PHASE OR CYCLE JITTER DETECTOR Public/Granted day:2014-05-08
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