Invention Grant
- Patent Title: Enhanced low inductance interconnections between electronic and opto-electronic integrated circuits
- Patent Title (中): 电子和光电集成电路之间增强的低电感互连
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Application No.: US14218634Application Date: 2014-03-18
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Publication No.: US09209509B2Publication Date: 2015-12-08
- Inventor: Kalpendu Shastri , Bipin Dama , Mark Webster , David Piede
- Applicant: Cisco Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cisco Technology, Inc.
- Current Assignee: Cisco Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Patterson & Sheridan, LLP
- Main IPC: G02B6/12
- IPC: G02B6/12 ; H01P3/00 ; G02F1/01 ; H05K1/02 ; G02F1/03 ; G02F1/225
Abstract:
A configuration for routing electrical signals between a conventional electronic integrated circuit (IC) and an opto-electronic subassembly is formed as an array of signal paths carrying oppositely-signed signals on adjacent paths to lower the inductance associated with the connection between the IC and the opto-electronic subassembly. The array of signal paths can take the form of an array of wirebonds between the IC and the subassembly, an array of conductive traces formed on the opto-electronic subassembly, or both.
Public/Granted literature
- US20140294334A1 ENHANCED LOW INDUCTANCE INTERCONNECTIONS BETWEEN ELECTRONIC AND OPTO-ELECTRONIC INTEGRATED CIRCUITS Public/Granted day:2014-10-02
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