-
1.发明授权公开(公告)号：US09209509B2
公开(公告)日：2015-12-08
申请号：US14218634
申请日：2014-03-18
Applicant: Cisco Technology, Inc.
Inventor： Kalpendu Shastri , Bipin Dama , Mark Webster , David Piede
CPC classification number: H01P3/00 , G02F1/011 , G02F1/0121 , G02F1/0327 , G02F1/225 , G02F1/2255 , G02F2201/124 , G02F2201/126 , H05K1/0245 , H05K2201/09245 , H05K2201/09254 , H05K2201/10121
Abstract: A configuration for routing electrical signals between a conventional electronic integrated circuit (IC) and an opto-electronic subassembly is formed as an array of signal paths carrying oppositely-signed signals on adjacent paths to lower the inductance associated with the connection between the IC and the opto-electronic subassembly. The array of signal paths can take the form of an array of wirebonds between the IC and the subassembly, an array of conductive traces formed on the opto-electronic subassembly, or both.
Abstract translation: 在常规电子集成电路（IC）和光电子组件之间布置电信号的配置被形成为在相邻路径上承载相反信号的信号路径阵列，以降低与IC和IC之间的连接相关联的电感 光电子组件。 信号路径阵列可以采取在IC和子组件之间的引线阵列的形式，形成在光电子组件上的导电迹线阵列，或两者。
-
2.发明授权公开(公告)号：US09052445B2
公开(公告)日：2015-06-09
申请号：US13656528
申请日：2012-10-19
Applicant: Cisco Technology, Inc.
Inventor： Kishor Desai , Ravinder Kachru , Vipulkumar Patel , Bipin Dama , Kalpendu Shastri , Soham Pathak
IPC: H01L21/00 , G02B6/12 , H01L33/52 , G02B6/42 , G02B6/43 , H01L23/04 , H01L23/48 , H01L25/16 , H01L31/0203 , H05K1/02 , H01L21/50
CPC classification number: G02B6/4255 , G02B6/12 , G02B6/13 , G02B6/4201 , G02B6/4257 , G02B6/4292 , G02B6/43 , H01L21/50 , H01L23/04 , H01L23/48 , H01L25/167 , H01L31/0203 , H01L33/52 , H01L2924/15311 , H01L2924/16152 , H01L2924/1616 , H01L2924/165 , H01L2924/16788 , H05K1/0268 , H05K1/0274 , H05K2201/10121 , H01L2924/0105 , H01L2924/01079
Abstract: An opto-electronic assembly is provided comprising a substrate (generally of silicon or glass) for supporting a plurality of interconnected optical and electrical components. A layer of sealing material is disposed to outline a defined peripheral area of the substrate. A molded glass lid is disposed over and bonded to the substrate, where the molded glass lid is configured to create a footprint that matches the defined peripheral area of the substrate. The bottom surface of the molded glass lid includes a layer of bonding material that contacts the substrate's layer of sealing material upon contact, creating a bonded assembly. In one form, a wafer level assembly process is proposed where multiple opto-electronic assemblies are disposed on a silicon wafer and multiple glass lids are molded in a single sheet of glass that is thereafter bonded to the silicon wafer.
Abstract translation: 提供了一种光电子组件，其包括用于支撑多个互连的光学和电气部件的基板（通常为硅或玻璃）。 设置一层密封材料以概述衬底的限定的周边区域。 将模制的玻璃盖设置在基底上并结合到基底上，其中模制的玻璃盖构造成产生与限定的基底周边区域匹配的覆盖区。 模制玻璃盖的底表面包括一层接合材料，其在接触时接触基底的密封材料层，形成结合组件。 在一种形式中，提出了一种晶片级组装工艺，其中多个光电组件设置在硅晶片上，并且多个玻璃盖被模制在一片玻璃中，然后将其粘合到硅晶片上。
-
3.发明授权Interposer configuration with thermally isolated regions for temperature-sensitive opto-electronic components 有权具有热隔离区域的插入器配置，用于温度敏感的光电子部件公开(公告)号：US08905632B2
公开(公告)日：2014-12-09
申请号：US13687021
申请日：2012-11-28
Applicant: Cisco Technology, Inc.
Inventor： Kalpendu Shastri , Soham Pathak , Vipulkumar Patel , Bipin Dama , Kishor Desai
CPC classification number: H01S5/02415 , G02B6/42 , G02B6/4273 , H01S5/005 , H01S5/0064 , H01S5/02248 , H01S5/024 , H01S5/02469 , H01S5/4025
Abstract: An interposer (support substrate) for an opto-electronic assembly is formed to include a thermally-isolated region where temperature-sensitive devices (such as, for example, laser diodes) may be positioned and operate independent of temperature fluctuations in other areas of the assembly. The thermal isolation is achieved by forming a boundary of dielectric material through the thickness of the interposer, the periphery of the dielectric defining the boundary between the thermally isolated region and the remainder of the assembly. A thermo-electric cooler can be used in conjunction with the temperature-sensitive device(s) to stabilize the operation of these devices.
Abstract translation: 形成用于光电组件的插入器（支撑衬底），以包括热隔离区域，其中可以将温度敏感器件（例如激光二极管）定位并独立于其中的温度波动 部件。 通过形成介电材料的边界通过插入件的厚度来实现热隔离，绝缘体的外围限定了热隔离区域和组件的其余部分之间的边界。 热电冷却器可与温度敏感设备结合使用，以稳定这些设备的运行。
-
公开(公告)号：US10209464B2
公开(公告)日：2019-02-19
申请号：US14517477
申请日：2014-10-17
Applicant: Cisco Technology, Inc.
Inventor： Stefan Martin Pfnuer , Matthew Joseph Traverso , Bipin Dama
Abstract: An optical transmitter may include a chip stack that includes an electrical IC that is mounted using solder balls to a photonic chip. These solder connections permit the electrical IC and the photonic chip to communicate. In addition, the transmitter may include a PCB coupled to the stack so that electrical signals in the PCB are transmitted to the IC and photonic chip (and vice versa). Instead of coupling the PCB to the stack using wire bonds attached to pads on a surface of the photonic chip, at least a portion of the PCB is disposed between the photonic chip and electrical IC. The PCB may also include bond pads used to form a direct solder connection to the electrical IC. As such, the electrical IC may include direct solder connections to both the PCB and the photonic chip.
-
5.发明申请公开(公告)号：US20150277068A1
公开(公告)日：2015-10-01
申请号：US14687119
申请日：2015-04-15
Applicant: Cisco Technology, Inc.
Inventor： Kishor DESAI , Ravinder Kachru , Vipulkumar Patel , Bipin Dama , Kalpendu Shastri , Soham Pathak
CPC classification number: G02B6/4255 , G02B6/12 , G02B6/13 , G02B6/4201 , G02B6/4257 , G02B6/4292 , G02B6/43 , H01L21/50 , H01L23/04 , H01L23/48 , H01L25/167 , H01L31/0203 , H01L33/52 , H01L2924/15311 , H01L2924/16152 , H01L2924/1616 , H01L2924/165 , H01L2924/16788 , H05K1/0268 , H05K1/0274 , H05K2201/10121 , H01L2924/0105 , H01L2924/01079
Abstract: An opto-electronic assembly is provided comprising a substrate (generally of silicon or glass) for supporting a plurality of interconnected optical and electrical components. A layer of sealing material is disposed to outline a defined peripheral area of the substrate. A molded glass lid is disposed over and bonded to the substrate, where the molded glass lid is configured to create a footprint that matches the defined peripheral area of the substrate. The bottom surface of the molded glass lid includes a layer of bonding material that contacts the substrate's layer of sealing material upon contact, creating a bonded assembly. In one form, a wafer level assembly process is proposed where multiple opto-electronic assemblies are disposed on a silicon wafer and multiple glass lids are molded in a single sheet of glass that is thereafter bonded to the silicon wafer.
Abstract translation: 提供了一种光电子组件，其包括用于支撑多个互连的光学和电气部件的基板（通常为硅或玻璃）。 设置一层密封材料以概述衬底的限定的周边区域。 将模制的玻璃盖设置在基底上并结合到基底上，其中模制的玻璃盖构造成产生与限定的基底周边区域匹配的覆盖区。 模制玻璃盖的底表面包括一层接合材料，其在接触时接触基底的密封材料层，形成结合组件。 在一种形式中，提出了一种晶片级组装工艺，其中多个光电组件设置在硅晶片上，并且多个玻璃盖被模制在一片玻璃中，然后将其粘合到硅晶片上。
-
Patent Agency Ranking
公开(公告)号：US08876410B2
公开(公告)日：2014-11-04
申请号：US13737080
申请日：2013-01-09
Applicant: Cisco Technology, Inc.
Inventor： Kalpendu Shastri , Soham Pathak , Utpal Chakrabarti , Vipulkumar Patel , Bipin Dama , Ravinder Kachru , Kishor Desai
CPC classification number: G02B6/4292 , B82Y20/00 , C03C15/00 , G02B6/136 , G02B6/4214 , G02B6/4246 , G02B6/4259 , Y10T29/4978
Abstract: An apparatus for providing self-aligned optical coupling between an opto-electronic substrate and a fiber array, where the substrate is enclosed by a transparent lid such that the associated optical signals enter and exit the arrangement through the transparent lid. The apparatus takes the form of a two-part connectorized fiber array assembly where the two pieces uniquely mate to form a self-aligned configuration. A first part, in the form of a plate, is attached to the transparent lid in the area where the optical signals pass through. The first plate includes a central opening with inwardly-tapering sidewalls surrounding its periphery. A second plate is also formed to include a central opening and has a lower protrusion with inwardly-tapering sidewalls that mate with the inwardly-tapering sidewalls of the first plate to form the self-aligned connectorized fiber array assembly. The fiber array is then attached to the second plate in a self-aligned fashion.
Abstract translation: 一种用于在光电子基板和光纤阵列之间提供自对准光耦合的装置，其中基板由透明盖包围，使得相关联的光信号通过透明盖进入和离开布置。 该装置采取两部分连接的光纤阵列组件的形式，其中两个部件独特地配合以形成自对准配置。 在光信号通过的区域中，透明盖附着有板的形式的第一部分。 第一板包括具有围绕其周边的向内逐渐变细的侧壁的中心开口。 第二板也形成为包括中心开口并且具有下突起，其具有向内渐缩的侧壁，与第一板的向内渐缩的侧壁配合形成自对准的连接纤维阵列组件。 然后将纤维阵列以自对准的方式附接到第二板。
-
公开(公告)号：US09793902B2
公开(公告)日：2017-10-17
申请号：US15048040
申请日：2016-02-19
Applicant: Cisco Technology, Inc.
Inventor： Kadaba Lakshmikumar , Mark Y. Tse , Bibhu Das , Bipin Dama
CPC classification number: H03L7/0807 , H03L7/087 , H03L7/093 , H03L7/095 , H03L7/113 , H04L7/0004 , H04L7/033 , H04L7/0331
Abstract: Embodiments herein describe a reference-less CDR circuit that receives electrical signals that may have been transmitted along either an electrical or optical interconnect which are then processed to identify the original data. To do so, the CDR circuit includes a frequency locking loop (FLL) and a phase locking loop (PLL) which generate control signals for a voltage controlled oscillator (VCO). In one embodiment, the FLL generates a coarse adjustment signal which the VCO uses to output a recovered clock that substantially matches the frequency of the received electrical signal. The PLL, on the other hand, generates a fine adjustment signal which the VCO uses to make small adjustments (e.g., half cycle phase shifts) to the recovered clock. The recovered clock outputted by the VCO is then fed back and used as an input in both the FLL and the PLL.
-
8.发明授权Interposer configuration with thermally isolated regions for temperature-sensitive opto-electronic components 有权具有热隔离区域的插入器配置，用于温度敏感的光电子部件公开(公告)号：US09031107B2
公开(公告)日：2015-05-12
申请号：US14510654
申请日：2014-10-09
Applicant: Cisco Technology, Inc.
Inventor： Kalpendu Shastri , Soham Pathak , Vipulkumar Patel , Bipin Dama , Kishor Desai
CPC classification number: H01S5/02415 , G02B6/42 , G02B6/4273 , H01S5/005 , H01S5/0064 , H01S5/02248 , H01S5/024 , H01S5/02469 , H01S5/4025
Abstract: An interposer (support substrate) for an opto-electronic assembly is formed to include a thermally-isolated region where temperature-sensitive devices (such as, for example, laser diodes) may be positioned and operate independent of temperature fluctuations in other areas of the assembly. The thermal isolation is achieved by forming a boundary of dielectric material through the thickness of the interposer, the periphery of the dielectric defining the boundary between the thermally isolated region and the remainder of the assembly. A thermo-electric cooler can be used in conjunction with the temperature-sensitive device(s) to stabilize the operation of these devices.
Abstract translation: 形成用于光电组件的插入器（支撑衬底），以包括热隔离区域，其中可以将温度敏感器件（例如激光二极管）定位并独立于其中的温度波动 部件。 通过形成介电材料的边界通过插入件的厚度来实现热隔离，绝缘体的外围限定了热隔离区域和组件的其余部分之间的边界。 热电冷却器可与温度敏感设备结合使用，以稳定这些设备的运行。
-
9.发明授权公开(公告)号：US09575266B2
公开(公告)日：2017-02-21
申请号：US14687119
申请日：2015-04-15
Applicant: Cisco Technology, Inc.
Inventor： Kishor Desai , Ravinder Kachru , Vipulkumar Patel , Bipin Dama , Kalpendu Shastri , Soham Pathak
IPC: G02B6/12 , G02B6/42 , H01L33/52 , G02B6/43 , H01L23/04 , H01L23/48 , H01L25/16 , H01L31/0203 , G02B6/13 , H05K1/02 , H01L21/50
CPC classification number: G02B6/4255 , G02B6/12 , G02B6/13 , G02B6/4201 , G02B6/4257 , G02B6/4292 , G02B6/43 , H01L21/50 , H01L23/04 , H01L23/48 , H01L25/167 , H01L31/0203 , H01L33/52 , H01L2924/15311 , H01L2924/16152 , H01L2924/1616 , H01L2924/165 , H01L2924/16788 , H05K1/0268 , H05K1/0274 , H05K2201/10121 , H01L2924/0105 , H01L2924/01079
Abstract: An opto-electronic assembly is provided comprising a substrate (generally of silicon or glass) for supporting a plurality of interconnected optical and electrical components. A layer of sealing material is disposed to outline a defined peripheral area of the substrate. A molded glass lid is disposed over and bonded to the substrate, where the molded glass lid is configured to create a footprint that matches the defined peripheral area of the substrate. The bottom surface of the molded glass lid includes a layer of bonding material that contacts the substrate's layer of sealing material upon contact, creating a bonded assembly. In one form, a wafer level assembly process is proposed where multiple opto-electronic assemblies are disposed on a silicon wafer and multiple glass lids are molded in a single sheet of glass that is thereafter bonded to the silicon wafer.
Abstract translation: 提供了一种光电子组件，其包括用于支撑多个互连的光学和电气部件的基板（通常为硅或玻璃）。 设置一层密封材料以概述衬底的限定的周边区域。 将模制的玻璃盖设置在基底上并结合到基底上，其中模制的玻璃盖构造成产生与限定的基底周边区域匹配的覆盖区。 模制玻璃盖的底表面包括一层接合材料，其在接触时接触基底的密封材料层，形成结合组件。 在一种形式中，提出了一种晶片级组装工艺，其中多个光电组件设置在硅晶片上，并且多个玻璃盖被模制在一片玻璃中，然后将其粘合到硅晶片上。
-
10.发明申请公开(公告)号：US20140003457A1
公开(公告)日：2014-01-02
申请号：US13687021
申请日：2012-11-28
Applicant: Cisco Technology, Inc
Inventor： Kalpendu Shastri , Soham Pathak , Vipulkumar Patel , Bipin Dama , Kishor Desai
IPC: H01S5/024
CPC classification number: H01S5/02415 , G02B6/42 , G02B6/4273 , H01S5/005 , H01S5/0064 , H01S5/02248 , H01S5/024 , H01S5/02469 , H01S5/4025
Abstract: An interposer (support substrate) for an opto-electronic assembly is formed to include a thermally-isolated region where temperature-sensitive devices (such as, for example, laser diodes) may be positioned and operate independent of temperature fluctuations in other areas of the assembly. The thermal isolation is achieved by forming a boundary of dielectric material through the thickness of the interposer, the periphery of the dielectric defining the boundary between the thermally isolated region and the remainder of the assembly. A thermo-electric cooler can be used in conjunction with the temperature-sensitive device(s) to stabilize the operation of these devices.
Abstract translation: 形成用于光电组件的插入器（支撑衬底），以包括热隔离区域，其中可以将温度敏感器件（例如激光二极管）定位并独立于其中的温度波动 部件。 通过形成介电材料的边界通过插入件的厚度来实现热隔离，绝缘体的外围限定了热隔离区域和组件的其余部分之间的边界。 热电冷却器可与温度敏感设备结合使用，以稳定这些设备的运行。
-
-
-
-
-
-
-
-
-
Search Results
13
records
(took 0.02 seconds)
