Invention Grant
US09219019B2 Packaged semiconductor devices having solderable lead surfaces exposed by grooves in package compound
有权
封装半导体器件具有可焊接的引线表面,由封装化合物中的沟槽暴露
- Patent Title: Packaged semiconductor devices having solderable lead surfaces exposed by grooves in package compound
- Patent Title (中): 封装半导体器件具有可焊接的引线表面,由封装化合物中的沟槽暴露
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Application No.: US14215896Application Date: 2014-03-17
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Publication No.: US09219019B2Publication Date: 2015-12-22
- Inventor: Alok Kumar Lohia , Reynaldo Corpuz Javier , Andy Quang Tran
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Steven A. Shaw; Frank D. Cimino
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/31 ; H01L23/498 ; H01L21/56 ; H01L21/48 ; H01L21/78

Abstract:
A semiconductor device has a leadframe with a pad and a row of elongated leads with a solderable surfaces in a common plane; a package encapsulating the leadframe with an assembled semiconductor device, leaving the common-plane lead surfaces un-encapsulated and coplanar with the package material between adjacent leads, the row of aligned leads positioned along a package edge; and grooves in the package material cut in the common-plane surface, the grooves extend along a portion of each lead length, have a width and a depth about twice the width, and expose solderable lead surfaces.
Public/Granted literature
- US20150262903A1 PACKAGED SEMICONDUCTOR DEVICES HAVING SOLDERABLE LEAD SURFACES EXPOSED BY GROOVES IN PACKAGE COMPOUND Public/Granted day:2015-09-17
Information query
IPC分类: