Invention Grant
- Patent Title: Transistors, semiconductor constructions, and methods of forming semiconductor constructions
- Patent Title (中): 晶体管，半导体结构和形成半导体结构的方法
-
Application No.: US14491830Application Date: 2014-09-19
-
Publication No.: US09219132B2Publication Date: 2015-12-22
- Inventor: Deepak Thimmegowda , Andrew R. Bicksler , Roland Awusie
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/44 ; H01L21/30 ; H01L29/66 ; H01L29/78 ; H01L21/28 ; H01L29/16 ; H01L29/49 ; H01L27/115
Abstract:
Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
Public/Granted literature
- US20150044834A1 Transistors, Semiconductor Constructions, and Methods of Forming Semiconductor Constructions Public/Granted day:2015-02-12
Information query
IPC分类:
