A processor employs a prefetch prediction module that predicts, for each prefetch request, whether the prefetch request is likely to be satisfied from (“hit”) the cache. The arbitration priority of prefetch requests that are predicted to hit the cache is reduced relative to demand requests or other prefetch requests that are predicted to miss in the cache. Accordingly, an arbiter for the cache is less likely to select prefetch requests that hit the cache, thereby improving processor throughput.