Invention Grant
US09224669B2 Method and structure for wafer level packaging with large contact area
有权
具有大接触面积的晶片级封装的方法和结构
- Patent Title: Method and structure for wafer level packaging with large contact area
- Patent Title (中): 具有大接触面积的晶片级封装的方法和结构
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Application No.: US14097433Application Date: 2013-12-05
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Publication No.: US09224669B2Publication Date: 2015-12-29
- Inventor: Yan Xun Xue
- Applicant: Yan Xun Xue
- Applicant Address: US CA Sunnyvale
- Assignee: ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED
- Current Assignee: ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED
- Current Assignee Address: US CA Sunnyvale
- Agent Chein-Hwa S. Tsao; Chen-Chi Lin
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/31 ; H01L21/78 ; H01L23/00 ; H01L23/48 ; H01L21/768 ; H01L21/304 ; H01L21/56

Abstract:
A method to provide a wafer level package with increasing contact pad area comprising the steps of forming a first packaging layer on wafer top surface, grinding the wafer back surface and etch through holes, depositing a metal to fill the through holes and covering wafer backside, cutting through the wafer from wafer backside forming a plurality of grooves separating each chip then depositing a second packaging layer filling the grooves and covering the wafer back metal, reducing the first packaging layer thickness to expose the second packaging layer filling the grooves and forming a plurality of contact pads overlaying the first packaging layer thereafter cutting through the second packaging layer in the grooves to form individual package.
Public/Granted literature
- US20150162257A1 METHOD AND STRUCTURE FOR WAFER LEVEL PACKAGING WITH LARGE CONTACT AREA Public/Granted day:2015-06-11
Information query
IPC分类: