Invention Grant
- Patent Title: Stacked semiconductor device
- Patent Title (中): 堆叠半导体器件
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Application No.: US14215398Application Date: 2014-03-17
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Publication No.: US09224811B2Publication Date: 2015-12-29
- Inventor: Kangguo Cheng , Ali Khakifirooz , Alexander Reznicek , Dominic J. Schepis
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC
- Current Assignee: GLOBALFOUNDRIES INC
- Current Assignee Address: KY Grand Cayman
- Agency: Roberts Mlotkowski Safran & Cole, P.C.
- Agent David Cain; Andrew M. Calderon
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L29/06 ; H01L29/78 ; H01L29/66 ; H01L27/088 ; H01L21/8234 ; H01L29/15

Abstract:
A stacked semiconductor device includes a first pair of vertically stacked self-aligned nanowires, a second pair of vertically stacked self-aligned nanowires, and a gate upon a semiconductor substrate, the gate surrounding portions of the first pair of vertically stacked self-aligned nanowires and the second pair of vertically stacked self-aligned nanowires. First epitaxy may merge the first pair of vertically stacked self-aligned nanowires and second epitaxy may merge second pair of vertically stacked self-aligned nanowires. The stacked semiconductor device may be fabricated by forming a lattice-fin upon the semiconductor substrate and the gate surrounding a portion of the lattice-fin. The vertically stacked self-aligned nanowires may be formed by selectively removing a plurality of layers from the lattice-fin.
Public/Granted literature
- US20150263088A1 STACKED SEMICONDUCTOR DEVICE Public/Granted day:2015-09-17
Information query
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