Invention Grant
- Patent Title: Dirty cacheline duplication
- Patent Title (中): 脏的缓存线重复
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Application No.: US13720536Application Date: 2012-12-19
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Publication No.: US09229803B2Publication Date: 2016-01-05
- Inventor: Gabriel H. Loh , Vilas K. Sridharan , James M. O'Connor , Jaewoong Sim
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee: ADVANCED MICRO DEVICES, INC.
- Current Assignee Address: US CA Sunnyvale
- Agency: Park, Vaughan, Fleming & Dowler LLP
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G06F12/08

Abstract:
A method of managing memory includes installing a first cacheline at a first location in a cache memory and receiving a write request. In response to the write request, the first cacheline is modified in accordance with the write request and marked as dirty. Also in response to the write request, a second cacheline is installed that duplicates the first cacheline, as modified in accordance with the write request, at a second location in the cache memory.
Public/Granted literature
- US20140173379A1 DIRTY CACHELINE DUPLICATION Public/Granted day:2014-06-19
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