Invention Grant
- Patent Title: Process for fabricating a silicon-on-insulator structure
- Patent Title (中): 用于制造绝缘体上硅结构的方法
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Application No.: US13629093Application Date: 2012-09-27
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Publication No.: US09230848B2Publication Date: 2016-01-05
- Inventor: Carole David , Sébastien Kerdiles
- Applicant: Soitec
- Applicant Address: FR Bernin
- Assignee: Soitec
- Current Assignee: Soitec
- Current Assignee Address: FR Bernin
- Agency: TraskBritt
- Priority: FR1158898 20111003
- Main IPC: H01L21/30
- IPC: H01L21/30 ; H01L21/762 ; H01L29/06 ; H01L21/3105

Abstract:
Embodiments of the invention relate to a process for fabricating a silicon-on-insulator structure comprising the following steps: providing a donor substrate and a support substrate, only one of the substrates being covered with an oxide layer; forming, in the donor substrate, a weak zone; plasma activating the oxide layer; bonding the donor substrate to the support substrate in a partial vacuum; implementing a bond-strengthening anneal at a temperature of 350° C. or less causing the donor substrate to cleave along the weak zone; and carrying out a heat treatment at a temperature above 900° C. A transition from the temperature of the bond-strengthening anneal to the temperature of the heat treatment may be achieved at a ramp rate above 10° C./s.
Public/Granted literature
- US20130207244A1 PROCESS FOR FABRICATING A SILICON-ON-INSULATOR STRUCTURE Public/Granted day:2013-08-15
Information query
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