Invention Grant
- Patent Title: Semiconductor device and method of simultaneous molding and thermalcompression bonding
- Patent Title (中): 同时成型和热压缩粘合的半导体器件和方法
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Application No.: US14038339Application Date: 2013-09-26
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Publication No.: US09245770B2Publication Date: 2016-01-26
- Inventor: KyungMoon Kim , KooHong Lee , JaeHak Yee , YoungChul Kim , Lan Hoang , Pandi C. Marimuthu , Steve Anderson , HeeJo Chi
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L21/56 ; H01L23/00 ; H01L23/31 ; H01L23/498

Abstract:
A semiconductor device has a semiconductor die disposed over a substrate. The semiconductor die and substrate are placed in a chase mold. An encapsulant is deposited over and between the semiconductor die and substrate simultaneous with bonding the semiconductor die to the substrate in the chase mold. The semiconductor die is bonded to the substrate using thermocompression by application of force and elevated temperature. An electrical interconnect structure, such as a bump, pillar bump, or stud bump, is formed over the semiconductor die. A flux material is deposited over the interconnect structure. A solder paste or SOP is deposited over a conductive layer of the substrate. The flux material and SOP provide temporary bond between the semiconductor die and substrate. The interconnect structure is bonded to the SOP. Alternatively, the interconnect structure can be bonded directly to the conductive layer of the substrate, with or without the flux material.
Public/Granted literature
- US20140175639A1 Semiconductor Device and Method of Simultaneous Molding and Thermalcompression Bonding Public/Granted day:2014-06-26
Information query
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